
AN8912 series
100Gbps PAM4 DSP
AN8912 series
100Gbps PAM4 DSP
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The AN8912 is a highly integrated low power PAM4 DSP SoC, supporting 100GbE applications. It has two lanes high-speed electrical interface to the host ASIC via a module connector, and also has two lanes high-speed optical interface to fiber via optical components.
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Equipped with re-timer and equalizer functions, the AN8912 retimes and equalizes a 53.125Gbps PAM4 and 26.5626/10.3125Gbps NRZ host side signal for 100GbE application, into corresponding line side signal.
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For cost-effective and compact assemblies, the AN8912 has an optional embedded VCSEL driver with single-ended output to drive VCSEL directly for MMF link, it also supports differential output to interface with external laser diode driver.
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With on-chip clock synthesis feature, the AN8912 can generate 156.25MHz clock internally for 100GbE applications by single 50MHz crystal oscillator.
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This chipset is in a compact 6mmx6mm package footprint, suitable for next generation optical module applications.
SPECIFICATIONS
PRODUCT MODEL
AN8912 100G-PAM4 DSP+LDD Chipset
HOST INTERFACE
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2x53.125Gbps PAM4 signal(up to 56.25G)
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Also support 2x26.5626/10.3125Gbps NRZ signal
LINE INTERFACE
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2x53.125Gbps PAM4 signal(up to 56.25G)
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Also support 2x26.5626/10.3125Gbps NRZ signal
FEATURES
HIGH INTEGRATION
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Optional embedded VCSEL driver
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Single 50MHz crystal clock source
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Low power consumption to make 1.75W 100G-SR2 module
APPLICATION
APPLICATION
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100G-SR2 optical PAM-4 transceivers
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DSFP/SFP-DD module form factors
